1. Field of the Invention
The present invention relates to a method of forming a p-type compound semiconductor layer, and more particularly, to a method of forming an (Al, Ga, In)N-based compound semiconductor layer including p-type impurities (p-layer), which can simplify a semiconductor forming process.
2. Discussion of the Background
(Al, Ga, In)N-based compound semiconductors are applied to compound semiconductor devices such as light emitting diodes (LEDs) or laser diodes (LDs). FIG. 1 is a longitudinal sectional view schematically showing a conventional (Al, Ga, In)N-based compound semiconductor device.
Referring to FIG. 1, an (Al, Ga, In)N-based compound semiconductor layer 13 including n-type impurities (n-layer), an active layer 15, and an (Al, Ga, In)N-based compound semiconductor layer (p-layer) 17 including p-type impurities are sequentially formed on a substrate 11.
These conventional (Al, Ga, In)N-based compound semiconductor layers are grown through processes such as metal organic chemical vapor deposition (MOCVD).
According to the MOCVD process, an (Al, Ga, In)N-based compound semiconductor layer is formed as follows. A source gas of a Group III element such as Al, Ga or In, and ammonia (NH3) gas containing hydrogen and nitrogen are introduced into a reaction chamber, and an n-layer 13, an active layer 15 and a p-layer 17 are sequentially grown on the substrate 11 at a temperature of 900 to 1,200° C. When the p-layer 17 is formed by means of magnesium (Mg) doping or the like, the substrate 11 is cooled by lowering the temperature of the reaction chamber while stopping the introduction of the source gas of the Group III element but maintaining the introduction of the ammonia.
Meanwhile, a conventional (Al, Ga, In)N-based compound semiconductor device 10 secures conductivity by typically doping the p-layer 17 with, for example, magnesium (Mg). However, a p-type impurity such as magnesium (Mg) is easily bonded to hydrogen (H) contained in ammonia when the temperature of the reaction chamber is lowered as described above. Accordingly, there is a problem in that a p-type compound semiconductor layer has an increased resistance value since the function of the p-type impurity as an acceptor for providing free holes is deteriorated.
Therefore, an additional annealing process of decoupling hydrogen from the p-type impurity is performed in a process of forming a p-layer of an (Al, Ga, In)N-based compound semiconductor.
FIG. 2 is a flowchart illustrating a conventional method of forming a p-layer of an (Al, Ga, In)N-based compound semiconductor.
Referring to FIG. 2, a p-layer of a compound semiconductor is grown on a substrate by increasing the temperature of the substrate to 900 to 1,200° C. in a reaction chamber and supplying a p-type impurity, a Group III element and ammonia into the reaction chamber (S1). When the p-layer is grown, the substrate is cooled to room temperature by lowering the temperature of the reaction chamber while continuously supplying a source gas of nitrogen containing hydrogen into the reaction chamber and stopping the supply of the p-type impurity and a source gas of the Group III element (S2). When the substrate is cooled to room temperature, the substrate with the p-layer grown thereon is taken out from the reaction chamber (S3). Then, an annealing process is performed to lower a resistance value of the p-layer grown on the substrate (S4). Referring to U.S. Pat. No. 5,306,662, a p-layer of a compound semiconductor is grown using a p-type impurity, a Group III element and ammonia, and an annealing process of the p-layer is then performed at a temperature of 400° C. or more. As a result, hydrogen bonded to the p-type impurity existing in the p-layer is removed, thereby forming a p-type (Al, Ga, In)N-based compound semiconductor with a low resistance value.
In such a conventional (Al, Ga, In)N-based compound semiconductor device, at least one annealing process should be additionally performed to lower a resistance value of a p-layer. However, there is a problem in that the additional annealing process makes a compound semiconductor device forming process complicated and cumbersome.
Furthermore, according to the addition of the annealing process, the time required for manufacturing a product increases, and expensive equipment especially for the annealing process should be purchased and a space for installing the equipment is needed, resulting in increased investment costs for manufacturing facilities.
Meanwhile, in order to solve such conventional problems, there has been proposed a method of cooling a substrate to room temperature while stopping supply of a p-type impurity, a Group III element and ammonia and lowering the temperature of a reaction chamber when growth of a p-layer is completed at a temperature of 900 to 1,200° C. within the reaction chamber.
However, this method has a problem in that the Group III element of Al, Ga or In and nitrogen are decomposed from the grown p-layer, causing severe damage to a surface of an (Al, Ga, In)N-based compound of the p-layer.